1. Field of the Invention
The present invention relates to a metal layer formation process, for forming a metal layer with minimal defects on the surface of an insulator.
Priority is claimed on Japanese Patent Application No. 2003-173705, filed Jun. 18, 2003, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, circuit boards that use TAB (Tape Automated Bonding) or FPC (Flexible Printed Circuit) have been identified as ideal for achieving further miniaturization and weight reductions of electronic equipment, and consequently, demand for these circuit boards continues to rise. Conventionally, these types of circuit boards have used a flexible plastic substrate, with a layer of copper foil bonded to this substrate with an adhesive such as an epoxy based adhesive. However, in order to achieve higher density packaging within electronic equipment, further reductions in the thickness of these circuit boards is now required, and the above construction, comprising a bonded layer of copper foil, is unable to adequately satisfy this requirement for further thickness reductions.
Accordingly, techniques are being investigated for forming metallized films without the use of an adhesive. For example, in one known method, a thin film formation process such as vacuum deposition, sputtering or ion plating is used to form a base metal film directly onto a plastic substrate, and a plating process or the like is then used to deposit a metal plating layer on top of the base metal film.
However, in the production method described above, the generation of a plurality of pinhole defects, with sizes ranging from several μm to several hundred μm, within the base metal film formed by the dry plating is unavoidable. If a metal plating layer is then formed on top of this type of base metal film containing pinhole defects, then even if the metal plating layer is able to seal these pinholes defects, problems can still arise, including the possibility of plating solution remaining within the pinhole defects and causing peeling of the metal film, and the chance that if a fine wiring pattern is formed on top of a pinhole defect, the wiring pattern may break.
Accordingly, Japanese Unexamined Patent Application, First Publication No. Hei 10-256700 proposes a method in which a base metal layer is formed on an insulator film using a dry plating process, a primary electroplated copper layer is formed on top of the base metal layer, the structure is then treated in an alkali solution, an electroless copper plating layer is subsequently formed on top of the primary electroplated copper layer as an intermediate layer, and finally, a secondary electroplated copper layer is formed on top of the intermediate layer.
However in this method, the base metal layer, the primary electroplated copper layer, the intermediate layer, and the secondary electroplated copper layer must be formed in sequence on the surface of the insulator film, and consequently the method is complex and the associated costs are high.
Furthermore, when forming an electroless plating layer, catalytic nuclei must be first adhered to the plating surface, and because these catalytic nuclei tend to adhere preferentially to the metal rather than the exposed insulator surface, the thickness of the electroless plating layer tends to be thinner within the pinhole defects than on the metal surface, meaning the pinhole defects cannot be completely filled. Accordingly, the occurrence of indentations in the metal layer surface at positions corresponding with the pinhole defects is unavoidable, making it difficult to form a metal layer of uniform thickness.
In addition, electroless plating processes are unable to form films as dense as those produced by electroplating processes. As a result, the surface of the electroless plating layer tends to be a rough structure with a multitude of surface irregularities, and consequently the secondary electroplated copper layer formed on top of this electroless plating layer, which reflects the surface state of the underlying electroless plating layer, is also rough, meaning the surface of the final metal layer is neither smooth nor dense.
The present invention takes the above circumstances into consideration, with an object of providing a process in which only the pinhole defects within a base metal film formed using a dry plating process can be coated selectively with a semiconductor, enabling the formation of a metal layer with excellent surface properties.